Index: ioemu/hw/piix4acpi.c
===================================================================
--- ioemu.orig/hw/piix4acpi.c	2007-05-03 19:46:01.000000000 +0100
+++ ioemu/hw/piix4acpi.c	2007-05-03 19:46:09.000000000 +0100
@@ -45,6 +45,10 @@
 #define GBL_RLS           (1 << 2)
 #define SLP_EN            (1 << 13)
 
+/* Bits of PM1a register define here  */
+#define SLP_TYP_MASK    0x1C00
+#define SLP_VAL         0x1C00
+
 typedef struct AcpiDeviceState AcpiDeviceState;
 AcpiDeviceState *acpi_device_table;
 
@@ -81,7 +85,13 @@
     s->pm1_control = (s->pm1_control & 0xff) | (val << 8);
 /*    printf("acpiPm1ControlP1_writeb \n addr %x val:%x\n", addr, val); */
 
-} 
+    // Check for power off request
+    val <<= 8;
+    if (((val & SLP_EN) != 0) &&
+        ((val & SLP_TYP_MASK) == SLP_VAL)) {
+        qemu_system_shutdown_request();
+    }
+}
 
 static uint32_t acpiPm1ControlP1_readb(void *opaque, uint32_t addr)
 {
@@ -105,7 +115,14 @@
     s->pm1_control = val;
 /*    printf("acpiPm1Control_writew \n addr %x val:%x\n", addr, val); */
 
-} 
+    // Check for power off request
+
+    if (((val & SLP_EN) != 0) &&
+        ((val & SLP_TYP_MASK) == SLP_VAL)) {
+        qemu_system_shutdown_request();
+    }
+
+}
 
 static uint32_t acpiPm1Control_readw(void *opaque, uint32_t addr)
 {
